Miracor Medical Systems

The basis for the Miracor PICSO Impulse System is the fact that the pressure in the coronary sinus increases when the vein is occluded. The system is therefore used shortly after an acute heart attack and builds up artificial blood pressure in the affected heart muscle tissue. This artificial blood flow can revitalize the affected tissue.

BLUE-ZONE GmbH has developed a hardware-in-the-loop test system for the PICSO Impulse System in order to provide Miracor Medical Systems with an optimal system test of its automated impulse cardiac catheter system.

The BLUE-ZONE GmbH test system starts at the system interfaces in order to be able to carry out an automated system test.

Sensors (e.g. buttons, temperature sensors, ...) and actuators (e.g. motors, display, ...) are separated from the system and the test system is inserted between them.

This means that the test system can either connect the real sensor/actuator to the device under test and measure it, or carry out a simulation.

The combination of both options reduces the test modeling effort, as it is not always necessary to simulate the entire system, but only the part that is actually to be tested.

The BLUE-ZONE GmbH test system thus eliminates the biggest obstacles to the expansion of already released software in medical technology, on the one hand the associated high verification effort, which often takes several man-weeks, and on the other hand the fact that many tests are difficult to reproduce or expensive (destructive tests). It enables tests to be carried out as often as required and reproducibly in a short time.

The test system has the following advantages for Miracor Medical Systems:

• Optimization of the test throughput time from weeks to hours
• One setup for an entire system test run (test run in continuous integration possible, as no manual intervention required)
• No additional test setups/test cabling required as customer-specific connectors
• Special sensors or actuators are implemented individually in the test system (CPU + FPGA)